نتایج جستجو برای: Voltage deviation reduction

تعداد نتایج: 659329  

Journal: :journal of operation and automation in power engineering 2014
f. namdari l. hatamvand n. shojaei h. beiranvand

voltage stability issues are growing challenges in many modern power systems. this paper proposes optimizing the size and location of static var compensator (svc) devices using a fuzzy weighted seeker optimization algorithm (fwsoa), as an effective solution to overcome such issues. although the primary purpose of svc is bus voltage regulation, it can also be useful for voltage stability enhance...

Journal: :international journal of information, security and systems management 2014
mohsen mohammadi nasser yousefi

this paper presents a new hybrid particle swarm optimization with time varying acceleration coefficients (hpsotvac) and bacteria foraging algorithm (bfa) namely (psotvac/bfa) base fuzzy stochastic long term approach for determining optimum location and size of distributed energy resources (ders). the monte carlo simulation method is used to model the uncertainties associated with long-term load...

Journal: :international journal of smart electrical engineering 2012
s.a hashemi zadeh o zeidabadi nejad s hasani a.a gharaveisi gh shahgholian

distributed generations (dgs) are utilized to supply the active and reactive power in the transmission and distribution systems. these types of power sources have many benefits such as power quality enhancement, voltage deviation reduction, power loss reduction, load shedding reduction, reliability improvement, etc. in order to reach the above benefits, the optimal placement and sizing of dg is...

Distributed Generations (DGs) are utilized to supply the active and reactive power in the transmission and distribution systems. These types of power sources have many benefits such as power quality enhancement, voltage deviation reduction, power loss reduction, load shedding reduction, reliability improvement, etc. In order to reach the above benefits, the optimal placement and sizing of DG is...

Journal: :IEICE Transactions 2007
Atsushi Iwata Takeshi Yoshida Mamoru Sasaki

Recently low-voltage and low-noise analog circuits with sub100nm CMOS devices are strongly demanded for implementing mobile digital multimedia and wireless systems. Reduction of supply voltage makes it difficult to attain a signal voltage swing, and device deviation causes large DC offset voltage and 1/f noise. This paper describes noise reduction technique for CMOS analog and RF circuits opera...

Journal: :IEEJ Transactions on Power and Energy 1996

2014
Muhammad Mujtaba Asad Razali Bin Hassan Fahad Sherwani

This paper explains about the voltage output for DC to DC boost converter between open loop, PID controller and fuzzy logic controller through Matlab Simulink. Simulink input voltage was set at 12V and the voltage reference was set at 24V. The analysis on the deviation of voltage resulted that the difference between reference voltage setting and the output voltage is always lower. Comparison be...

2013
A. Siva Sankar

This paper proposes an algorithm for optimal placement of FACTS devices in transmission line to maintain the power system voltage stability and optimal sizing of the FACTS device. The aim of this paper is to improve voltage stability and reduce the total power losses. Here, voltage stability means no variation in the voltages of each bus beyond its boundaries and system stability is the ability...

Journal: :IEICE Electronic Express 2016
Zhengping Li Chunyu Peng Wenjuan Lu Lijun Guan Youwu Tao Xincun Ji Junning Chen

A resilient tracking circuit for suppressing the timing variation of SRAM sense amplifier enable (SAE) signal is proposed. Pipelined replica bitline technique is used to favour the desired design. Simulation results show that the cycle time is reduced by ∼27% owing to ∼70% reduction of the standard deviation of SAE at a 1.05V supply voltage in 28 nm CMOS technology with four-stage pipeline.

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